Showcase [Showcase] A Significant Progress on Binary to BCD Decoder

putianyi888

Terrarian
This thread follows from this thread. I'm still not satisfied with the 5*6 unit because there is space between logic gates. I dreamt of finding some logical expressions that can support a 4*5 unit, which is as compact as possible. I spent some days making no progress until today when I wrote a program to search valid logical expressions with brute force. I got a bunch of candidates and finally I was lucky enough to find a set of expressions making the unit 4*4 and can be compactly placed.
I have checked and can confirm that the logic is right.
upload_2019-2-12_23-46-42.png
upload_2019-2-12_23-47-35.png

Denote the 4 inputs from higher digit to lower digit by a,b,c and d.
The 4 outputs are clearly shown in the picture. The logical expressions of the 4 gates, from left to right, are:
^(~ac,abd,~acd)
abc&bcd&~c
^(~ad,~abcd,ab)
^(~d,c,b)

This unit can be stacked like this:
upload_2019-2-12_23-58-13.png

Beautiful, isn't it?

@ekinator
 
Niiice, on the same theme, I have complete adder/subtractor, multiplier and divider units that I have never released. Would you be interested in them? I'll be able to get to them at 17:00 (EET)
 
Is the program you wrote made specifically for this decoder or it can do any circuit?
i'm most proud of this one. It changes the adder itself to a subtractor instead of flipping the B input and adding 1 to the first carry.

ywMFqZV.png
instead of using the bulky module I made in my thread, I updated the adder from the multiplier of my calculator.
oKiJ5bY.png
this has the same story as the multiplier.
SDae61c.png

mgQ6eOD.png
world download
 
Is the program you wrote made specifically for this decoder or it can do any circuit?
The input is just a truth table. But sadly it hardly has anything to do with full binary logic. BCD can make use of it because output can be arbitrary when input is 10~15. Full binary logic has no freedom and the logical expression is usually unique.
i'm most proud of this one. It changes the adder itself to a subtractor instead of flipping the B input and adding 1 to the first carry.
This is the most compact design as far as I know.
instead of using the bulky module I made in my thread, I updated the adder from the multiplier of my calculator.
Have you tried shifting the layers so that green wires and yellow wires can be aligned and thus the height can be compressed?
this has the same story as the multiplier.
The divider can be compressed. You don't need to do 8-bit subtract 8-bit at the first step. Instead, send the first 7 bit of the divisor to an OR gate and do subtraction with only the first bit of the dividend and the last bit of the divisor. In this way, the comparison can be done in 2 steps instead of 8 steps. The following comparisons can be done in 3,4,5,... steps respectively. This change saves a lot of gate cascades.
BTW size is the main reason why I sort of give up my divider. The divider is just stupidly large.
 
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The full adders are of an outdated version, but it's still smaller than yours. I believe that you can make your multiplier much smaller.
9ab20e6071d08836babed596ce6f1101636057ab.png@1248w_2336h.webp
 
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