Programmatic
Steampunker
Your RAM could easily be reduced from 6x3 to 2x3 blocks per bit if you use a purely faulty gate based design like this:
Basically, when the red wire is triggered, the value stored in the gate is swapped with the value being carried by the blue wire. What you could do then, is a have a bus of 16 blue/green alternating wires to represent the currently accessed register. The bits in the bus can be modified to alter the value of that register. When the input address changes, the value in the bus would be swapped with the currently empty value in the register and then swapped again with the value of the register at the new input address.
If you alternate between blue and green wires, you can tile this gate easily in a 2x3 block space per bit, making it 3 times as compact as your current design.
If you want, I can send you the world file for my last RAM design so you can take a look at it.
Basically, when the red wire is triggered, the value stored in the gate is swapped with the value being carried by the blue wire. What you could do then, is a have a bus of 16 blue/green alternating wires to represent the currently accessed register. The bits in the bus can be modified to alter the value of that register. When the input address changes, the value in the bus would be swapped with the currently empty value in the register and then swapped again with the value of the register at the new input address.
If you alternate between blue and green wires, you can tile this gate easily in a 2x3 block space per bit, making it 3 times as compact as your current design.
If you want, I can send you the world file for my last RAM design so you can take a look at it.